The present technique relates to estimation of a cause of a defect in a memory system.
There is a system including a plurality of devices such as a central processing unit (CPU), a system controller, a memory controller, and a memory module. To configure such a system, first, a test for confirming whether each device operates normally is performed. After that, only devices that have passed the test are used to configure the system.
However, even if the system is configured by using only the devices that have passed the test, a defect may occur in the system due to an abnormality that has not been detected in the testing of each device. Here, it is difficult to specify which of the devices and the system has the cause of the defect, so that a lot of effort is needed.
Related art documents include Japanese Laid-open Patent Publication Nos. 06-124218, and 2000-11687.